The 586-Engine^(TM) (5E) is a C/C++ programmable controller based on a 32-bit 100/133 MHz AMD Elan SC520. The SC520 integrates an Am586 CPU and a high performance ANSI/IEEE 754 compliant 64-bit hardware floating point unit (FPU). It is designed for embedded systems that require high performance, PC-compatibility,compactness, and high reliability at a low cost. Whether you use it as the processor core component of an OEM product, as part of a smart sensor, or as a node in a distributed microprocessor system, building your product around the 5E will reduce development time and costs, minimize technical risks, and allow you to deliver a more reliable end product.

The FPU provides arithmetic instructions to handle numeric data and transcendental functions for sine, tangent, logarithms, etc, making this controller useful for intensive computational applications. It is estimated to be 10-50 times faster than software-emulate on an 8/16-bit controller without a FPU.

The 586-Engine supports up to 15 external interrupts. There are a total of seven timers, including one programmable interval timer (PIT) that provides three 16-bit PIT timers and three 16-bit GP timers, plus a software timer. These timers can support timing or counting external events. The software timer provides a very efficient hardware time base with microsecond resolution. A real-time clock (RTC) provides time-of-day, 100-year calendar and 114 bytes of battery backed RAM.

Two industrial-standard 16550-compatible UARTs support baud rates up to 1.152 M baud. One synchronous serial interface (SSI) supports full-duplex bi-directional communication. One additional optional UART (SCC2691) can be installed.

The 586-Engine^(TM) boots from on-board 256K 16-bit ACTF Flash, and supports up to 256K 16-bit battery-backed SRAM. SDRAM and DMA are not supported. Up to 1GB memory expansion can be added with MemCard-A and PCMCIA ATA Flash cards.

There are 32 programmable multifunctional I/O lines (PIO) that can be used as general I/O or other functions. Two supervisor chips monitor 5V and 3.3V and provide power failure detection, watchdog and system reset. The 2.5V is used for the SC520 core and 3.3V for the I/O operation. Signal lines on headers are 3.3V output, and 5V maximum input.

All components are soldered on board for highest reliability. The 586-Engine^(TM) can be powered with a single regulated 5V with the on-board 3.3V and 2.5V regulators. It also can be powered by external regulated 5V, 3.3V, and 2.5V.

A total of 19 analog inputs are supported with a serial ADC (TLC2543, 11 inputs, 20KHz sample rate, 12-bit, 0-REF+) and a parallel ADC (AD7852, 8 inputs, 100KHz sample rate, 12-bit, 0-5V). Two serial DACs (LTC1446, 2 channels, 0-4.095V) and a parallel 12-bit DAC (DA7625, 4 channels, 0-2.5V) can be in-stalled to provide a total of 8 analog outputs.

The 586-Engine shares a similar pin-out and physical dimensions with the i386-Engine, A-Engine and V25-Engine-LM. As compared to these other engine-based controllers, the 5E offers substantially more computing power at greater per-unit costs and power requirements.

The 388 pin BGA package of the SC520 CPU makes repair support for the 586-Engine not available.